Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Semiconductor devices perform a wide range of functions such as analog and digital signal processing, sensors, transmitting and receiving electromagnetic signals, controlling electronic devices, power management, and audio/video signal processing. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, diodes, rectifiers, thyristors, and power metal-oxide-semiconductor field-effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, application specific integrated circuits (ASIC), power conversion, standard logic, amplifiers, clock management, memory, interface circuits, and other signal processing circuits.
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual images for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed operations and other useful functions.
Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each semiconductor die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual semiconductor die from the finished wafer and packaging the die to provide structural support, electrical interconnect, and environmental isolation. The term “semiconductor die” as used herein refers to both the singular and plural form of the words, and accordingly, can refer to both a single semiconductor device and multiple semiconductor devices.
One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices are desirable for enabling manufacture of smaller end products. A smaller semiconductor device size can be achieved by improvements in the front-end process resulting in semiconductor die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint or height by improvements in electrical interconnection and packaging materials.
FIG. 1a illustrates a conventional leadless package 10 as a quad flat no-lead (QFN) or dual flat no-lead (DFN) package. Leadless package 10 includes a semiconductor die 24 disposed on a leadframe 26. Leadframe 26 is formed from a metallic substrate with material of the substrate removed to create a plurality of leads 26a surrounding a die pad 26b. Semiconductor die 24 is disposed on die pad 26b and includes contact pads coupled to leads 26a by bond wires 36. An encapsulant or molding compound 40 is disposed around semiconductor die 24 and leadframe 26 for electrical isolation and protection from contaminants.
Leadless package 10 is mounted to a printed circuit board (PCB) or other substrate 20. Solder 50 is reflowed between leadframe contacts 26a and contact pads 22 on PCB 20 to form a metallurgical and electrical connection between leadless package 10 and the PCB. Leadless package 10 includes leads 26a for external interconnection, which are simply portions of a metal leadframe exposed from the final package. Leads 26a are used instead of leads that extend from the package laterally and/or vertically as in traditional semiconductor package types. The exposed wettable material of contacts 26a on the lateral surfaces of package 10 allows solder 50 to form filleted surfaces 52 after leadless package 10 is mounted onto PCB 20.
Fillets 52 are useful to manufacturers of electronic devices because proper interconnection between semiconductor die 24 and PCB 20 can be verified visually by a human or by an automatic visual inspection device 56 including a camera and a computer programmed to analyze the images. If a visual inspection shows that a proper fillet 52 was not formed for one of the connections of a lead 26a to a contact pad 22, an error in the specific PCB 20 is recorded. If visual inspection device 56 verifies that each connection between leadless package 10 and PCB 20 includes a proper fillet 52, the manufacturer can have confidence that the package is properly connected to the system as a whole.
Leadless package 10 reduces the footprint required on PCB 20 over many prior art packages by not having leads that extend from the package, and instead having leads 26a that remain within the footprint of the package body. Leadless packages have been further reduced in size by reducing a thickness of the leadframe. The substrate material of leadframe 26 must be thick enough to support semiconductor die 24 during the manufacturing process. FIG. 1b illustrates a leadless package 60 with a plated leadframe 66, which is significantly thinner than leadframe 26 of leadless package 10. Leadframe 66 is similar to leadframe 26, but is formed by plating the leadframe on a separate sacrificial substrate for physical support.
Leadframe 66 is not relied upon to provide physical support for semiconductor die 24 during formation of leadless package 60 because of support from the sacrificial substrate, so leadframe 66 can be plated as a relatively thin layer. The thinner leadframe 66 results in a final leadless package 60 that is thinner than leadless package 10. However, the reduced thickness of leadframe 66 also results in a concomitant reduction in adhesion between the leadframe and encapsulant 40. To increase adhesion, manufacturers form contacts 66a that do not extend fully to the lateral edges of package 60.
Encapsulant 40 fully surrounds contacts 66a in plated leadless packages to increase contact area and mold lock between the encapsulant and the leadless contacts. However, without contacts 66a exposed at the flanks of leadless package 60, solder 70 does not form a fillet easily visible when the leadless package is mounted on PCB 20. The sides of package 60 do not include wettable surfaces for solder 70 to reflow onto. While forming a leadless package with a plated leadframe results in a thinner semiconductor package for a potentially smaller end product, installation of the package does not form filleted solder connections. The resulting connection of solder 70 between leadless package 60 and PCB 20 is more difficult to verify with visual inspection device 56, and may require other technology, such as x-ray devices, to properly verify.
Therefore, a need exists for a method of forming a leadless package using a plated leadframe that also has wettable flanks to form a filleted solder connection.